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 BTS 5215L
Smart High-Side Power Switch Two Channels: 2 x 90m Status Feedback
Product Summary
Operating Voltage Vbb Active channels On-state Resistance RON Nominal load current IL(NOM) Current limitation IL(SCr) 5.5...40V two parallel 45m 7.4A 12A
Package
P-DSO-12
one 90m 3.7A 12A
General Description
* * N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions
Applications
* * * * C compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads All types of resistive, inductive and capacitve loads Most suitable for loads with high inrush currents, so as lamps Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
* * * * * * * Very low standby current CMOS compatible input Improved electromagnetic compatibility (EMC) Fast demagnetization of inductive loads Stable behaviour at undervoltage Wide operating voltage range Logic ground independent from load ground
Protection Functions
* * * * * * * * Short circuit protection Overload protection Current limitation Thermal shutdown Overvoltage protection (including load dump) with external resistor Reverse battery protection with external resistor Loss of ground and loss of Vbb protection Electrostatic discharge protection (ESD)
Block Diagram
Vbb
IN1 ST1 IN2 ST2 Logic Channel 1 Channel 2
Load 1 Load 2
Diagnostic Function
* * * Diagnostic feedback with open drain output Open load detection in OFF-state Feedback of thermal shutdown in ON-state
GND
Infineon Technologies AG
1
2003-Oct-01
BTS 5215L
Functional diagram
GND
internal voltage supply
IN1 ST1
logic
gate control + charge pump
current limit
VBB
clamp for inductive load
OUT1
ESD
temperature sensor Open load detection channel 1
reverse battery protection
IN2 ST2
control and protection circuit equivalent to channel 1
OUT2
Infineon Technologies AG
2
2003-Oct-01
BTS 5215L
Pin Definitions and Functions
Pin 1 2 4 3 5 6,12, heat slug 7,9,11 8 10 Symbol GND IN1 IN2 ST1 ST2 Vbb Function Ground of chip Input 1,2 activates channel 1,2 in case of logic high signal Diagnostic feedback 1 & 2 of channel 1,2 open drain, low on failure Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance Not Connected Output 1,2 protected high-side power output of channel 1 and 2. Design the wiring for the max. short circuit current
Pin configuration
(top view)
GND IN1 ST1 IN2 ST2 Vbb
1* 2 3 4 5 6
Vbb*
12 11 10 9 8 7
Vbb NC OUT1 NC OUT2 NC
NC OUT2 OUT1
* heat slug
Infineon Technologies AG
3
2003-Oct-01
BTS 5215L Maximum Ratings at Tj = 25C unless otherwise specified
Parameter Supply voltage (overvoltage protection see page 6) Supply voltage for full short circuit protection Tj,start = -40 ...+150C Load current (Short-circuit current, see page 6) Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V RI2) = 2 , td = 400 ms; IN = low or high, each channel loaded with RL = 13.5 , Operating temperature range Storage temperature range Power dissipation (DC)4) Ta = 25C: Ta = 85C: (all channels active) Maximal switchable inductance, single pulse Vbb = 12V, Tj,start = 150C4), see diagrams on page 10 IL = 3.5 A, EAS = 178 mJ, 0 one channel: IL = 7.0 A, EAS = 337 mJ, 0 two parallel channels: Electrostatic discharge capability (ESD) IN: (Human Body Model) ST: out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 R=1.5k; C=100pF
Symbol Vbb Vbb IL VLoad dump3) Tj Tstg Ptot
Values 43 36 self-limited 60 -40 ...+150 -55 ...+150 3.1 1.6
Unit V V A V C W
ZL VESD
21.3 10 1.0 4.0 8.0 -10 ... +16 0.3 5.0 5.0
mH kV
Input voltage (DC) see internal circuit diagram page 9 Current through input pin (DC) Pulsed current through input pin5) Current through status pin (DC)
VIN IIN IINp IST
V mA
1) 2) 3) 4) 5)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 resistor for the GND connection is recommended. RI = internal resistance of the load dump test pulse generator VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 only for testing
Infineon Technologies AG
4
2003-Oct-01
BTS 5215L Thermal Characteristics
Parameter and Conditions Thermal resistance junction - Case6) junction - ambient6) @ 6 cm2 cooling area Symbol min each channel: RthjC Rthja one channel active: all channels active: ----Values typ max --45 40 5 ---Unit
K/W
Electrical Characteristics
Parameter and Conditions, each of the four channels
at Tj = -40...+150C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT); IL = 2 A each channel, Tj = 25C: RON Tj = 150C: two parallel channels, Tj = 25C:
see diagram, page 11
---3.7 7.4 --
70 140 35 4.7 9.5 --
90 180 45 --
m
Nominal load current
one channel active: IL(NOM) two parallel channels active:
A
Device on PCB6), Ta = 85C, Tj 150C
Output current while GND disconnected or pulled up7); IL(GNDhigh)
Vbb = 32 V, VIN = 0, see diagram page 9
2
mA s
Turn-on time8) Turn-off time RL = 12 Slew rate on 8) Slew rate off 8)
IN IN
to 90% VOUT: ton to 10% VOUT: toff
--0.2 0.2
100 100 ---
250 270 1.0 1.1
10 to 30% VOUT, RL = 12 : dV/dton 70 to 40% VOUT, RL = 12 : -dV/dtoff
V/s V/s
6) 7) 8)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 not subject to production test, specified by design See timing diagram on page 12.
Infineon Technologies AG
5
2003-Oct-01
BTS 5215L
Parameter and Conditions, each of the four channels
at Tj = -40...+150C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max 5.5 --41 -------47 4.5 --1 40 4.5 4.510) 52 10 15 1010) 5
Unit
Operating Parameters Operating voltage Undervoltage switch off9) Overvoltage protection11) I bb = 40 mA Standby current12) VIN = 0; see diagram page 11
Vbb(on) Tj =-40C...25C: Vbb(u so) Tj =125C: Vbb(AZ)
V V V A
Tj =-40C...25C: Ibb(off) Tj =150C: Tj =125C: Off-State output current (included in Ibb(off)) IL(off) VIN = 0; each channel Operating current 13), VIN = 5V, one channel on: IGND all channels on: Protection Functions14) Current limit, Vout = 0V, (see timing diagrams, page 12) Tj =-40C: IL(lim) Tj =25C: Tj =+150C: Repetitive short circuit current limit, Tj = Tjt each channel IL(SCr) two channels
(see timing diagrams, page 12)
A
---
0.6 1.2
1.2 2.4
mA
--9 ---41 150 --
-15 -12 12 2 47 -10
23 ------52 ---
A
A
Initial short circuit shutdown time
Vout = 0V
Tj,start =25C: toff(SC) VON(CL) Tjt
ms V C K
(see timing diagrams on page 12)
Output clamp (inductive load switch off)15)
at VON(CL) = Vbb - VOUT, IL= 40 mA
Thermal overload trip temperature Thermal hysteresis
9) 10) 11)
Tjt
12) 13) 14
15)
is the voltage, where the device doesnt change its switching condition for 15ms after the supply voltage falling below the lower limit of Vbb(on) not subject to production test, specified by design Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 resistor for the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram on page 9. Measured with load; for the whole device; all channels off Add IST, if IST > 0 Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL)
Infineon Technologies AG
6
2003-Oct-01
BTS 5215L
Parameter and Conditions, each of the four channels
at Tj = -40...+150C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Reverse Battery Reverse battery voltage 16) Drain-source diode voltage (Vout > Vbb) IL = - 2.0 A, Tj = +150C Diagnostic Characteristics Open load detection voltage
-Vbb -VON
---
-600
32 --
V mV
V OUT(OL)1
1.7
2.8
4.0
V
Input and Status Feedback17) Input resistance
(see circuit page 9)
RI VIN(T+) VIN(T-) VIN(T) td(STon) td(STon) td(SToff) td(SToff) IIN(off) IIN(on) VST(high) VST(low)
2.5 -1.0 --30 --5 10 5.4 --
4.0 --0.2 10 ----35 ---
6.0 2.5 --20 -500 20 20 60 -0.6
k V V V s s s s A A V
Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Status change after positive input slope18) with open load Status change after positive input slope18) with overload Status change after negative input slope with open load Status change after negative input slope18) with overtemperature Off state input current VIN = 0.4 V: On state input current VIN = 5 V: Status output (open drain) Zener limit voltage IST = +1.6 mA: ST low voltage IST = +1.6 mA:
Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and circuit page 9). 17) If ground resistors R GND are used, add the voltage drop across these resistors. 18) not subject to production test, specified by design
16)
Infineon Technologies AG
7
2003-Oct-01
BTS 5215L Truth Table
( each channel )
IN Normal operation Open load Overtemperature L H L H L H OUT L H Z H L L ST H H L19) H H L
L = "Low" Level H = "High" Level
X = don't care Z = high impedance, potential depends on external circuit Status signal valid after the time delay shown in the timing diagrams
Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel (see truth table). If switching channel 1 to 2 in parallel, the status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor.
Terms
Ibb V bb I IN1 I IN2 I ST1 VIN1 V IN2 V I ST2 ST1 V ST2 2 4 3 5 12,6 IN1 IN2 ST1 ST2 GND 1 I R GND GND V OUT2 Leadframe V ON1 V ON2 10 I L1 I L2 V
Vbb OUT1 PROFET OUT2
8
OUT1
Leadframe (Vbb) is connected to pin 6,12 External RGND optional; single resistor RGND = 150 for reverse battery protection up to the max. operating voltage.
19)
L, if potential at the Output exceeds the OpenLoad detection voltage
Infineon Technologies AG
8
2003-Oct-01
BTS 5215L
Input circuit (ESD protection), IN1 or IN2
R IN I
Overvolt. and reverse batt. protection
+ 5V + Vbb V IN
R ST RI Logic R ST ST
V Z1
Z2
ESD-ZD I GND
I
I
OUT
The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.
GND
R GND
Signal GND
R Load
Load GND
Status output, ST1 or ST2
+5V
R ST(ON)
ST
VZ1 = 6.1 V typ., VZ2 = 47 V typ., RGND = 150 , RST= 15 k, RI= 3.5 k typ. In case of reverse battery the load current has to be limited by the load. Temperature protection is not active
GND
ESDZD
Open-load detection, OUT1 or OUT2
OFF-state diagnostic condition: Open Load, if VOUT > 3 V typ.; IN low
V
ESD-Zener diode: 6.1 V typ., max 0.3 mA; RST(ON) < 375 at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.
bb
Inductive and overvoltage output clamp,
OUT1 or OUT2
+Vbb VZ V
R EXT
OFF
V OUT
Logic unit
ON
Open load detection
OUT
Signal GND
GND disconnect
Power GND
VON clamped to VON(CL) = 47 V typ.
IN
Vbb PROFET OUT
ST GND V bb V IN V ST V GND
Any kind of load. In case of IN = high is VOUT VIN - VIN(T+). Due to VGND > 0, no VST = low signal available.
Infineon Technologies AG
9
2003-Oct-01
BTS 5215L
GND disconnect with GND pull up Inductive load switch-off energy dissipation
E bb
IN Vbb PROFET ST GND OUT
E AS Vbb PROFET OUT ELoad
IN
=
V V bb IN ST V V GND
ST GND ZL
{
R L
L
EL
ER
Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available.
Energy stored in load inductance: EL = 1/2*L*I L While demagnetizing load inductance, the energy dissipated in PROFET is EAS= Ebb + EL - ER= VON(CL)*iL(t) dt, with an approximate solution for RL > 0 :
2
Vbb disconnect with energized inductive load
high
IN
Vbb PROFET OUT
ST GND
EAS=
IL* L (V + |VOUT(CL)|) 2*RL bb
ln (1+ |V
IL*RL
OUT(CL)|
)
V
Maximum allowable load inductance for a single switch off (one channel)4)
bb
L = f (IL ); Tj,start = 150C, Vbb = 12 V, RL = 0 ZL [mH]
1000
For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page 10) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection.
100
10
1 1 2 3 4 5 6
IL [A]
Infineon Technologies AG
10
2003-Oct-01
BTS 5215L
Typ. on-state resistance
RON = f (Vbb,Tj ); IL = 2 A, IN = high RON [mOhm]
160
Tj = 150C
120
80
25C -40C
40
0 5 7 9 11 30 40
Vbb [V]
Typ. standby current
Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1,2 = low Ibb(off) [A]
45 40 35 30 25 20 15 10 5 0 -50 0 50 100 150 200
Tj [C]
Infineon Technologies AG
11
2003-Oct-01
BTS 5215L
Timing diagrams
All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4
Figure 1a: Vbb turn on: IN1 Figure 2b: Switching a lamp:
IN
IN2 V bb V
ST
OUT1
V
OUT
V
OUT2
ST1 open drain
I
L
ST2 open drain t
Figure 3a: Turn on into short circuit: shut down by overtemperature, restart by cooling
IN1 other channel: norm al operation
t
Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition:
IN
VOUT
90% t on dV/dton 10% t dV/dtoff
I
L1
I
L(lim) I L(SCr)
off
t ST off(SC)
IL
t
Heating up of the chip may require several milliseconds, depending on external conditions
t
Infineon Technologies AG
12
2003-Oct-01
BTS 5215L
Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2)
IN1/2
Figure 5a: Open load: detection in OFF-state, turn on/off to open load Open load of channel 1; other channels normal operation
IN1
I
L1
+I
L2
VOUT1
2xIL(lim)
I L1
I L(SCr)
t ST1/2
ST
off(SC)
10s 500s
t
ST1 and ST2 have to be configured as a 'Wired OR' function ST1/2 with a single pull-up resistor.
Figure 4a: Overtemperature: Reset if Tj IN
Figure 6a: Status change after, turn on/off to overtemperature Overtemperature of channel 1; other channels normal operation
IN1
ST
ST
30s 20s
V
OUT
T
J
t
Infineon Technologies AG
13
2003-Oct-01
BTS 5215L
Package and Ordering Code
Standard: P-DSO-12-2
Sales Code Ordering Code
2.6 max.
A
BTS 5215L Q67060-S7023
0.10.05 3)
B 7.5 0.1 1)
6.4 0.1 1) 8
Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81669 Munchen (c) Infineon Technologies AG 2001 All Rights Reserved. Attention please!
5 3
0.25 B
2.35 0.1 (1.55)
0.25 +0.075
0 +0.1
-0.035
2)
8
0.1
1
5x 1 = 5 0.4 +0.13 5.1 0.1 12 7
0.1 C 12x Seating Plane
C 0.7 0.15 (0.2) (4.4) 10.3 0.3
The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in lifesupport devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
0.25
M
1.6 0.1 (1.8) 4.2 0.1
o0.8 x 0.1 -0.05 Depth 4)
1 6 7.8 0.1 (Heatslug)
1) Does not include 2) Stand OFF 3) Stand OUT 4)
plastic or metal protrusion of 0.15 max. per side
Pin 1 Index Marking; Polish finish All package corners max. R 0.25
All dimensions in millimetres
Printed circuit board (FR4, 1.5mm thick, one layer 70m, 6cm2 active heatsink area) as a reference for max. power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja
Infineon Technologies AG
0.8
CAB
14
2003-Oct-01


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